The present invention relates to electric devices and methods for fabricating the same, and especially relates to techniques for forming wiring.
With recent increase in packaging density for integrated circuits, intervals between wires have been reduced, resulting in increased electrical parasitic capacitances created between the wires (hereinafter, referred to as wire-to-wire capacitances). However, reduction in the wire-to-wire capacitances has been needed in integrated circuits that require high-speed operation.
In view of this, to reduce the wire-to-wire capacitance, methods for reducing the relative dielectric constant of an insulating film provided between wires (hereinafter, also referred to as an inter-wiring insulating film) have been developed (see Japanese Laid-Open Publication No. 2002-93903, for example).
Hereinafter, a known method for fabricating an electric device will be described with reference to the drawings.
FIGS. 5A through 5C and FIGS. 6A through 6C are cross-sectional views showing respective process steps of a known method for fabricating an electric device.
First, as shown in FIG. 5A, an insulating film 101 made of a first insulating material is formed over the entire surface of a semiconductor substrate 100, and then the insulating film 101 is selectively etched, thereby forming a recess 102 in a signal-delay-prevention region (i.e., a region where a signal line is to be formed) of the insulating film 101, as shown in FIG. 5B. In this case, the etching time is controlled, thereby allowing the insulating film 101 to remain under the recess 102.
Next, as shown in FIG. 5C, a low-dielectric-constant insulating film 103 made of a second insulating material is formed over the insulating film 101 to fill the recess 102 completely.
Subsequently, as shown in FIG. 6A, part of the low-dielectric-constant insulating film 103 located outside the recess 102 (i.e., part of the low-dielectric-constant insulating film 103 located above the upper surface of the insulating film 101) is removed by, for example, chemical mechanical polishing (CMP). This makes the upper surface of the low-dielectric-constant insulating film 103 flush with the upper surface of the insulating film 101.
Then, a plurality of wiring grooves are formed in each of the low-dielectric-constant insulating film 103 and the insulating film 101 (i.e., the region other than the signal-delay-prevention region), and then a metal film made of copper or an alloy of copper is deposited over the entire surfaces of the low-dielectric-constant insulating film 103 and the insulating film 101. Thereafter, part of the metal film located outside the wiring grooves (i.e., part of the metal film located above the respective upper surfaces of the low-dielectric-constant insulating film 103 and the insulating film 101) is removed by, for example, CMP. In this way, as shown in FIG. 6B, power-source lines 104 are formed in the wiring grooves in the insulating film 101 (i.e., the region other than the signal-delay-prevention region), and signal lines 105 are formed in the wiring grooves in the low-dielectric-constant insulating film 103.
Lastly, as shown in FIG. 6C, a diffusion barrier layer 106 for preventing copper from diffusing is formed over the entire surfaces of the power-source lines 104, signal lines 105, lower-dielectric-constant insulating film 103 and insulating film 101.
With the known method described above, a low-dielectric-constant film can be selectively formed in a region where a fabricator does not want a wiring delay to occur and, in addition, the mechanical strength of the wiring structure can be maintained.
In the known method, if wires are arranged densely and the whole of a wiring layer can maintain its mechanical strength by utilizing the high mechanical strength of the wiring itself, a low-dielectric-constant insulating film with low mechanical strength can be used as an inter-wiring insulating film. However, if wires are arranged sparsely and the low-dielectric-constant insulating film is used as an inter-wiring insulating film, the mechanical strength of the whole wiring layer cannot be maintained only by the mechanical strength of the wiring itself
In addition, in the known method, the use of a plurality of insulating films made of mutually different materials as inter-wiring insulating films in a wiring layer requires a special masking process (e.g., a lithography process and an etching process) (see FIG. 5B). Moreover, it is generally difficult to form a minute pattern of a low-dielectric-constant film using a mask.